VL4005 Reconfigurable Architectures Syllabus:
VL4005 Reconfigurable Architectures Syllabus – Anna University PG Syllabus Regulation 2021
COURSE OBJECTIVES:
The student shall develop an overview and deeper insight into the research and development that is underway to meet future needs of flexible processors
to learn the concepts of implementation, synthesis and placement of modules in reconfigurable architectures
to understand the communication techniques and System on Programmable Chip for reconfigurable architectures
to learn the process of reconfiguration management
to familiarize the applications of reconfigurable architectures
UNIT – I INTRODUCTION
General purpose computing – domain specific processors – Application Specific Processors – reconfigurable computing – fields of application – evolution of reconfigurable systems – simple Programmable Logic Devices – Complex Programmable Logic Devices – Field Programmable Gate Arrays – coarse grained reconfigurable devices.
UNIT – II IMPLEMENTATION, SYNTHESIS AND PLACEMENT
Integration – FPGA design flow – logic synthesis – LUT based technology mapping – modeling – temporal partitioning algorithms – offline and online temporal placement – managing device’s free and occupied spaces.
UNIT – III COMMUNICATION AND SOPC
Direct communication – communication over third party – bus based communication – circuit switching – Network on Chip – dynamic Network on Chip – System on a Programmable Chip – adaptive multi-processing on chip.
UNIT – IV RECONFIGURATION MANAGEMENT
Reconfiguration – configuration architectures – managing the reconfiguration process – reducing configuration transfer time – configuration security.
UNIT – V APPLICATIONS
FPGA based parallel pattern matching – low power FPGA based architecture for microphone arrays in Wireless Sensor Networks – exploiting partial reconfiguration on a dynamic coarse grained reconfigurable architecture – parallel pipelined OFDM baseband modulator with dynamic frequency scaling for 5G systems.
TOTAL :45 PERIODS
COURSE OUTCOMES:
At the end of this course, the students should will be able to:
CO1: analyze the different architecture principles relevant to reconfigurable computing systems
CO2: compare the tradeoffs that are necessary to meet the area, power and timing criteria of reconfigurable systems
CO3: analyze the algorithms related to placement and partitioning
CO4:analyze the communication techniques and system on programmable chip for reconfigurable architectures
CO5: analyze the principles of Network and System on a Programmable Chip
REFERENCES
1. Christophe Bobda, “Introduction to Reconfigurable Computing: Architectures, Algorithms and Applications”, Springer 2007.
2. Scott Hauck and Andre Dehon, “Reconfigurable Computing: The Theory and Practice of FPGA Based Computation”, Elsevier 2008
3. M. Gokhale and P. Graham, “Reconfigurable Computing: Accelerating Computation with Field-Programmable Gate Arrays”, Springer, 2005.
4. Nikoloas Voros Et Al. “Applied Reconfigurable Computing: Architectures, Tools and Applications” Springer, 2018.
5. Koen Bertels, João M.P. Cardoso, Stamatis Vassiliadis, “Reconfigurable Computing: Architectures and Applications”, Springer 2006.