VL4003 DSP Structures for VLSI Syllabus:

VL4003 DSP Structures for VLSI Syllabus – Anna University PG Syllabus Regulation 2021

COURSE OBJECTIVES:

 to understand the fundamentals of DSP
 to learn various DSP structures and their implementation.
 to know designing constraints of various filters
 design and optimize VLSI architectures for basic DSP algorithms
 to enable students to design VLSI system with high speed and low power.

UNIT I INTRODUCTION TO DIGITAL SIGNAL PROCESSING

Linear system theory- convolution- correlation – DFT- FFT- basic concepts in FIR filters and IIR filters- filter realizations. Representations of DSP algorithms- block diagram-SFG-DFG.

UNIT II ITERATION BOUND, PIPELINING AND PARALLEL PROCESSING OF FIR FILTER

Data-flow graph representations- Loop bound and Iteration bound algorithms for computing iteration bound-LPM algorithm. Pipelining and parallel processing: pipelining of FIR digital filters parallel processing, pipelining and parallel processing for low power.

UNIT III RETIMING, UNFOLDING AND FOLDING

Retiming: definitions, properties and problems- solving systems of inequalities. Properties of Unfolding, critical path, Unfolding and Retiming, applications of Unfolding, Folding transformation register minimization techniques, register minimization in folded architecture- folding of multirate system.

UNIT IV FAST CONVOLUTION

Cook-toom algorithm- modified cook-Toom algorithm. Design of fast convolution algorithm by inspection – Winograd algorithm- modified Winograd algorithm

UNIT V ARITHMETIC STRENGTH REDUCTION IN FILTERS

Parallel FIR filters-fast FIR algorithms-two parallel and three parallel. Parallel architectures for rank order filters -odd-even, merge-sort architecture-rank order filter architecture-parallel rank order filters-running order merge order sorter, low power rank order filter.

TOTAL:45 PERIODS

COURSE OUTCOMES:

At the end of the course student will be able
CO1: acquired knowledge about fundamentals of DSP processors.
CO2: improve the overall performance of DSP system through various transformation and optimization techniques.
CO3: to understand the need of different types of instructions for DSP.
CO4: optimize design in terms of computation complexity and speed.
CO5: understand clock based issues and design asynchronous and wave pipelined systems.

REFERENCES

1. K.K Parhi: “VLSI Digital Signal Processing”, John-Wiley, 2nd Edition Reprint, 2008.
2. John G.Proakis, Dimitris G.Manolakis, “Digital Signal Processing”, Prentice Hall of India, 1st Edition, 2009.

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