VE4011 Physical Design Automation Syllabus:

VE4011 Physical Design Automation Syllabus – Anna University PG Syllabus Regulation 2021

COURSE OBJECTIVES:

 Understand the concepts of physical design process such as partitioning, floor planning, placement and routing.
 Discuss the concepts of design optimization algorithms and their application to physical design automation.
 Understand the concepts of simulation and synthesis in VLSI design automation
 Formulate CAD design problems using algorithmic methods

UNIT I INTRODUCTION

Layout and Design Rules, Materials for VLSI Fabrication, Basic Algorithmic Concepts for Physical Design, Physical Design Processes and Complexities. Partition: Kernigham-Lin’s Algorithm, Fiduccia Mattheyes Algorithm, Krishnamurthy Extension, Hmetis Algorithm, Multilevel Partition Techniques.

UNIT II FLOOR-PLANNING

Planning: Hierarchical Design, Wire Length Estimation, Slicing and Non-Slicing Floor Plan, Polar Graph Representation, Operator Concept, Stock meyer Algorithm for Floor Planning, Mixed Integer Linear Program.

UNIT III PLACEMENT

Design Types: ASICS, SOC, Microprocessor RLM; Placement Techniques: Simulated Annealing, Partition Based, Analytical, and Hall’s Quadratic; Timing and Congestion Considerations

UNIT IV ROUTING

Detailed, Global and Specialized Routing, Channel Ordering, Channel Routing Problems and Constraint Graphs, Routing Algorithms, Yoshimura And Kuh’s Method, Zone Scanning and Net Merging, Boundary Terminal Problem, Minimum Density Spanning Forest Problem, Topological Routing, Cluster Graph Representation.

UNIT V SEQUENTIAL LOGIC OPTIMIZATION AND CELL BINDING

State Based Optimization, State Minimization, Algorithms; Library Binding and Its Algorithms, Concurrent Binding.

TOTAL:45 PERIODS

PRACTICAL EXERCISES: 30 PERIODS

1. Graph Algorithms
Graph Search Algorithms
Spanning Tree Algorithm
Shortest Path Algorithm
Steiner Tree Algorithm
2. Partitioning Algorithms
Group Migration Algorithms
Simulated Annealing And Evolution Algorithms
Metric Allocation Method
3. Floor Planning Algorithms
Constraint Based Methods
Integer Programming Based Method
Rectangular Dualization Based Methods
Hierarchical Tree Based Methods
Simulated Evolution Algorithms
Time Driven Floor planning Algorithms
4. Routing Algorithms
Two Terminal Algorithms
Multi Terminal Algorithm

COURSE OUTCOMES:

At the end of this course, the students should will be able to:
CO1:Students can know how to place the blocks and how to partition the blocks while for designing the layout for IC.
CO2:Students can solve the performance issues in circuit layout.
CO3:Students are able to analyze physical design problems and employ appropriate automation algorithms for partitioning, floor planning, placement and routing
CO4:Students can decompose large mapping problem into pieces, including logic optimization with partitioning, placement and routing
CO5:Students can analyze circuits using both analytical and CAD tools

TOTAL:45+30=75 PERIODS

REFERENCES

1. Sarrafzadeh, M. and Wong, C.K, “An Introduction to VLSI Physical Design”, 4th Edition, Mc Graw-Hill
2. Wolf. W, “Modern VLSI Design System on Silicon”, 2nd Ed., Pearson Education.
3. Dreschler, “Evolutionary Algorithms for VLSI CAD ”, 3rd Edition, Springer.
4. Sait, S.M, And Youssef, “VLSI Physical Design Automation: Theory And Practice”, 1999, World Scientific Publishing Company.
5. Sherwani, “Algorithms for VLSI Physical Design Automation”, 2nd Edition, Kluwer