II4092 System on Chip Syllabus:

II4092 System on Chip Syllabus – Anna University PG Syllabus Regulation 2021

COURSE OBJECTIVE:

 To introduce architecture and design concepts underlying system on chips.
 Students can gain knowledge of designing SoCs.
 To impart knowledge about the hardware-software design of a modest complexity chip all the way from specifications, modeling, synthesis and physical design.

UNIT I SYSTEM ARCHITECTURE: OVERVIEW

Components of the system – Processor architectures – Memory and addressing – system level interconnection – SoC design requirements and specifications – design integration – design complexity – cycle time, die area and cost, ideal and practical scaling, area-time-power tradeoff in processor design, Configurability.

UNIT II PROCESSOR SELECTION FOR SOC

Overview – soft processors, processor core selection. Basic concepts – instruction set, branches, interrupts and exceptions. Basic elements in instruction handling – Minimizing pipeline delays – reducing the cost of branches – Robust processors – Vector processors, VLIW processors, Superscalar processors.

UNIT III MEMORY DESIGN

SoC external memory, SoC internal memory, Scratch pads and cache memory – cache organization and write policies – strategies for line replacement at miss time – split I- and Dcaches – multilevel caches – SoC memory systems – board based memory systems – simple processor/memory interaction.

UNIT IV INTERCONNECT ARCHITECTURES AND SOC CUSTOMIZATION

Bus architectures – SoC standard buses – AMBA, Core Connect – Processor customization approaches – Reconfigurable technologies – mapping designs onto reconfigurable devices – FPGA based design – Architecture of FPGA, FPGA interconnect technology, FPGA memory, Floor plan and routing.

UNIT V FPGA BASED EMBEDDED PROCESSOR

Hardware software task partitioning – FPGA fabric Immersed Processors – Soft Processors and Hard Processors – Tool flow for Hardware/Software Co-design –Interfacing Processor with memory and peripherals – Types of On-chip interfaces – Wishbone interface, Avalon Switch Matrix, OPB Bus Interface, Creating a Customized Microcontroller – FPGA-based Signal Interfacing and Conditioning.

TOTAL:45 PERIODS

COURSE OUTCOMES:

Upon successful completion of the program the students shall
CO1: Explain all important components of a System-on-Chip and an embedded system, i.e.
CO2: digital hardware and embedded software;
CO3: Outline the major design flows for digital hardware and embedded software;
CO4: Discuss the major architectures and trade-offs concerning performance, cost and power
CO5: consumption of single chip and embedded systems

REFERENCES:

1. Wayne Wolf, “Modern VLSI Design – System – on – Chip Design”, Prentice Hall, 3rd Edition, 2008.
2. Wayne Wolf , “Modern VLSI Design – IP based Design”, Prentice Hall, 4th Edition, 2008