VE4203 VLSI Structures for DSP Syllabus:

VE4203 VLSI Structures for DSP Syllabus – Anna University PG Syllabus Regulation 2021

COURSE OBJECTIVES:

 To Understand the Fundamentals of DSP
 To Learn Various DSP Structures And Their Implementation.
 To Know Designing Constraints of Various Filters
 Design And Optimize VLSI Architectures for Basic DSP Algorithms
 To Enable Students To Design VLSI System With High Speed And Low Power.

UNIT I INTRODUCTION TO DIGITAL SIGNAL PROCESSING

Linear System Theory- Convolution- Correlation – DFT- FFT- Basic Concepts In FIR Filters And IIR Filters- Filter Realizations. Representation of DSP Algorithms-Block Diagram-SFG-DFG.

UNIT II ITERATION BOUND, PIPELINING AND PARALLEL PROCESSING OF FIR FILTER

Data-Flow Graph Representations- Loop Bound and Iteration Bound Algorithms for Computing Iteration Bound-LPM Algorithm. Pipelining and Parallel Processing: Pipelining of FIR Digital Filters Parallel Processing – Pipelining and Parallel Processing for Low Power.

UNIT III RETIMING, UNFOLDING AND FOLDING

Retiming: Definitions Properties and Problems- Solving Systems of Inequalities. Properties of Unfolding, Critical Path, Unfolding and Retiming Applications of Unfolding, Folding Transformation- Register Minimization Techniques, Register Minimization In Folded Architecture Folding of Multirate System.

UNIT IV FAST CONVOLUTION

Cook-Toom Algorithm- Modified Cook-Toom Algorithm. Design of Fast Convolution Algorithm By Inspection

UNIT V ARITHMETIC STRENGTH REDUCTION IN FILTERS

Parallel FIR Filters-Fast FIR Algorithms-Two Parallel And Three Parallel. Parallel Architectures for Rank Order Filters -Odd Even Merge Sort Architecture-Rank Order Filter Architecture-Parallel Rank Order Filters-Running Order, Merge Order , Sorter , Low Power Rank Order Filter.

TOTAL:45 PERIODS

COURSE OUTCOMES:

At the end of the course student will be able
CO1: acquired knowledge about fundamentals of DSP processors.
CO2: improve the overall performance of DSP system through various transformation and optimization techniques.
CO3: foster ability to understand the need of different types of instructions for DSP.
CO4: optimize design in terms of computation complexity and speed.
CO5: understand clock based issues and design asynchronous and wave pipelined systems.

REFERENCES

1. K.K Parhi: “VLSI Digital Signal Processing”, John-Wiley, 2nd Edition Reprint, 2008.
2. John G.Proakis, Dimitris G.Manolakis, “Digital Signal Processing”, Prentice Hall of India, 1st Edition, 2009.

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