VL4291 Low Power VLSI Design Syllabus:

VL4291 Low Power VLSI Design Syllabus – Anna University PG Syllabus Regulation 2021

COURSE OBJECTIVES:

 identify sources of power in an IC.
 identify the power reduction techniques based on technology independent and technology dependent methods
 identify suitable techniques to reduce the power dissipation
 estimate power dissipation of various MOS logic circuits
 develop algorithms for low power dissipation

UNIT I POWER DISSIPATION IN CMOS

Hierarchy of Limits of Power – Sources of Power Consumption – Physics of Power Dissipation in CMOS FET Devices – Basic Principle of Low Power Design.

UNIT II POWER OPTIMIZATION

Logic Level Power Optimization – Circuit Level Low Power Design – Gate Level Low Power Design –Architecture Level Low Power Design – VLSI Subsystem Design of Adders, Multipliers, PLL, Low Power Design

UNIT III DESIGN OF LOW POWER CMOS CIRCUITS

Computer Arithmetic Techniques for Low Power System – Reducing Power Consumption in Combinational Logic, Sequential Logic, Memories – Low Power Clock – Advanced Techniques – Special Techniques, Adiabatic Techniques – Physical Design, Floor Planning, Placement and Routing.

UNIT IV POWER ESTIMATION

Power Estimation Techniques, Circuit Level, Gate Level, Architecture Level, Behavioral Level, – Logic Power Estimation – Simulation Power Analysis –Probabilistic Power Analysis

UNIT V SYNTHESIS AND SOFTWARE DESIGN FOR LOW POWER CMOS CIRCUITS

Synthesis for Low Power – Behavioral Level Transform –Algorithms for Low Power – Software Design for Low Power.

TOTAL:45 PERIODS

COURSE OUTCOMES:

At the end of this course, the students should will be able to:
CO1: able to find the power dissipation of MOS circuits
CO2: design and analyze various MOS logic circuits
CO3 :apply low power techniques for low power dissipation
CO4: able to estimate the power dissipation of ICs
CO5: able to develop algorithms to reduce power dissipation by software tools.

REFERENCES

1. Kaushik Roy and S.C.Prasad, “Low Power CMOS VLSI Circuit Design”, Wiley, 2000
2. J.B.Kulo and J.H Lou, “Low Voltage CMOS VLSI Circuits”, Wiley 1999.
3. James B.Kulo, Shih-Chia Lin, “Low Voltage SOI CMOS VLSI Devices and Circuits”, John Wiley and Sons, Inc. 2001
4. J.Rabaey, “Low Power Design Essentials (Integrated Circuits and Systems)”, Springer, 2009