VL4252 VLSI Testing Syllabus:

VL4252 VLSI Testing Syllabus – Anna University PG Syllabus Regulation 2021

COURSE OBJECTIVES:

 to introduce the VLSI testing.
 to introduce logic and fault simulation and testability measures
 to study the test generation for combinational and sequential circuits
 to study the design for testability.
 to study the fault diagnosis

UNIT I INTRODUCTION TO TESTING

Introduction – VLSI Testing Process and Test Equipment – Challenges in VLSI Testing – Test Economics and Product Quality – Fault Modeling – Relationship Among Fault Models.

UNIT II LOGIC & FAULT SIMULATION & TESTABILITY MEASURES

Simulation for Design Verification and Test Evaluation – Modeling Circuits for Simulation – Algorithms for True Value and Fault Simulation – Scoap Controllability and Observability

UNIT III TEST GENERATION FOR COMBINATIONAL AND SEQUENTIAL CIRCUITS

Algorithms and Representations – Redundancy Identification – Combinational ATPG Algorithms – Sequential ATPG Algorithms – Simulation Based ATPG – Genetic Algorithm Based ATPG

UNIT IV DESIGN FOR TESTABILITY

Design for Testability Basics – Testability Analysis – Scan Cell Designs – Scan Architecture – Built-in Self-Test – Random Logic Bist – DFT for Other Test Objectives.

UNIT V FAULT DIAGNOSIS

Introduction and Basic Definitions – Fault Models for Diagnosis – Generation of Vectors for Diagnosis – Combinational Logic Diagnosis – Scan Chain Diagnosis – Logic BIST Diagnosis.

TOTAL:45 PERIODS

COURSE OUTCOMES:

At the end of this course, the students will be able to:
CO1:Understand VLSI Testing Process
CO2:Develop Logic Simulation and Fault Simulation
CO3:Develop Test for Combinational and Sequential Circuits
CO4:Understand the Design for Testability
CO5:Perform Fault Diagnosis.

REFERENCES

1. Laung-Terng Wang, Cheng-Wen Wu and Xiaoqing Wen, “VLSI Test Principles and Architectures”, Elsevier, 2017
2. Michael L. Bushnell and Vishwani D. Agrawal, “Essentials of Electronic Testing for Digital, Memory & Mixed-Signal VLSI Circuits” , Kluwer Academic Publishers, 2017.
3. Niraj K. Jha and Sandeep Gupta, “Testing of Digital Systems”, Cambridge University Press, 2017.